!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/
!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/
!_TAG_PROGRAM_AUTHOR	Darren Hiebert	/dhiebert@users.sourceforge.net/
!_TAG_PROGRAM_NAME	Exuberant Ctags	//
!_TAG_PROGRAM_URL	http://ctags.sourceforge.net	/official site/
!_TAG_PROGRAM_VERSION	5.7	//
AIC31ADCInit	aic31.c	/^void AIC31ADCInit(unsigned int baseAddr) $/;"	f
AIC31DACInit	aic31.c	/^void AIC31DACInit(unsigned int baseAddr)$/;"	f
AIC31DataConfig	aic31.c	/^void AIC31DataConfig(unsigned int baseAddr, unsigned char dataType, $/;"	f
AIC31I2SConfigure	board.c	/^void AIC31I2SConfigure(void)$/;"	f
AIC31Reset	aic31.c	/^void AIC31Reset(unsigned int baseAddr)$/;"	f
AIC31SampleRateConfig	aic31.c	/^void AIC31SampleRateConfig(unsigned int baseAddr, unsigned int mode, $/;"	f
AIC31_DATATYPE_DSP	aic31.h	50;"	d
AIC31_DATATYPE_I2S	aic31.h	49;"	d
AIC31_DATATYPE_LEFTJ	aic31.h	52;"	d
AIC31_DATATYPE_RIGHTJ	aic31.h	51;"	d
AIC31_MODE_ADC	aic31.h	57;"	d
AIC31_MODE_BOTH	aic31.h	59;"	d
AIC31_MODE_DAC	aic31.h	58;"	d
AIC31_P0_REG0	aic31.c	48;"	d	file:
AIC31_P0_REG1	aic31.c	49;"	d	file:
AIC31_P0_REG10	aic31.c	58;"	d	file:
AIC31_P0_REG100	aic31.c	147;"	d	file:
AIC31_P0_REG101	aic31.c	148;"	d	file:
AIC31_P0_REG102	aic31.c	149;"	d	file:
AIC31_P0_REG11	aic31.c	59;"	d	file:
AIC31_P0_REG12	aic31.c	60;"	d	file:
AIC31_P0_REG13	aic31.c	61;"	d	file:
AIC31_P0_REG14	aic31.c	62;"	d	file:
AIC31_P0_REG15	aic31.c	63;"	d	file:
AIC31_P0_REG16	aic31.c	64;"	d	file:
AIC31_P0_REG17	aic31.c	65;"	d	file:
AIC31_P0_REG18	aic31.c	66;"	d	file:
AIC31_P0_REG19	aic31.c	67;"	d	file:
AIC31_P0_REG2	aic31.c	50;"	d	file:
AIC31_P0_REG20	aic31.c	68;"	d	file:
AIC31_P0_REG21	aic31.c	69;"	d	file:
AIC31_P0_REG22	aic31.c	70;"	d	file:
AIC31_P0_REG23	aic31.c	71;"	d	file:
AIC31_P0_REG24	aic31.c	72;"	d	file:
AIC31_P0_REG25	aic31.c	73;"	d	file:
AIC31_P0_REG26	aic31.c	74;"	d	file:
AIC31_P0_REG27	aic31.c	75;"	d	file:
AIC31_P0_REG28	aic31.c	76;"	d	file:
AIC31_P0_REG29	aic31.c	77;"	d	file:
AIC31_P0_REG3	aic31.c	51;"	d	file:
AIC31_P0_REG30	aic31.c	78;"	d	file:
AIC31_P0_REG31	aic31.c	79;"	d	file:
AIC31_P0_REG32	aic31.c	80;"	d	file:
AIC31_P0_REG33	aic31.c	81;"	d	file:
AIC31_P0_REG34	aic31.c	82;"	d	file:
AIC31_P0_REG35	aic31.c	83;"	d	file:
AIC31_P0_REG36	aic31.c	84;"	d	file:
AIC31_P0_REG37	aic31.c	85;"	d	file:
AIC31_P0_REG38	aic31.c	86;"	d	file:
AIC31_P0_REG4	aic31.c	52;"	d	file:
AIC31_P0_REG40	aic31.c	87;"	d	file:
AIC31_P0_REG41	aic31.c	88;"	d	file:
AIC31_P0_REG42	aic31.c	89;"	d	file:
AIC31_P0_REG43	aic31.c	90;"	d	file:
AIC31_P0_REG44	aic31.c	91;"	d	file:
AIC31_P0_REG45	aic31.c	92;"	d	file:
AIC31_P0_REG46	aic31.c	93;"	d	file:
AIC31_P0_REG47	aic31.c	94;"	d	file:
AIC31_P0_REG48	aic31.c	95;"	d	file:
AIC31_P0_REG49	aic31.c	96;"	d	file:
AIC31_P0_REG5	aic31.c	53;"	d	file:
AIC31_P0_REG50	aic31.c	97;"	d	file:
AIC31_P0_REG51	aic31.c	98;"	d	file:
AIC31_P0_REG52	aic31.c	99;"	d	file:
AIC31_P0_REG53	aic31.c	100;"	d	file:
AIC31_P0_REG54	aic31.c	101;"	d	file:
AIC31_P0_REG55	aic31.c	102;"	d	file:
AIC31_P0_REG56	aic31.c	103;"	d	file:
AIC31_P0_REG57	aic31.c	104;"	d	file:
AIC31_P0_REG58	aic31.c	105;"	d	file:
AIC31_P0_REG59	aic31.c	106;"	d	file:
AIC31_P0_REG6	aic31.c	54;"	d	file:
AIC31_P0_REG60	aic31.c	107;"	d	file:
AIC31_P0_REG61	aic31.c	108;"	d	file:
AIC31_P0_REG62	aic31.c	109;"	d	file:
AIC31_P0_REG63	aic31.c	110;"	d	file:
AIC31_P0_REG64	aic31.c	111;"	d	file:
AIC31_P0_REG65	aic31.c	112;"	d	file:
AIC31_P0_REG66	aic31.c	113;"	d	file:
AIC31_P0_REG67	aic31.c	114;"	d	file:
AIC31_P0_REG68	aic31.c	115;"	d	file:
AIC31_P0_REG69	aic31.c	116;"	d	file:
AIC31_P0_REG7	aic31.c	55;"	d	file:
AIC31_P0_REG70	aic31.c	117;"	d	file:
AIC31_P0_REG71	aic31.c	118;"	d	file:
AIC31_P0_REG72	aic31.c	119;"	d	file:
AIC31_P0_REG73	aic31.c	120;"	d	file:
AIC31_P0_REG74	aic31.c	121;"	d	file:
AIC31_P0_REG75	aic31.c	122;"	d	file:
AIC31_P0_REG76	aic31.c	123;"	d	file:
AIC31_P0_REG77	aic31.c	124;"	d	file:
AIC31_P0_REG78	aic31.c	125;"	d	file:
AIC31_P0_REG79	aic31.c	126;"	d	file:
AIC31_P0_REG8	aic31.c	56;"	d	file:
AIC31_P0_REG80	aic31.c	127;"	d	file:
AIC31_P0_REG81	aic31.c	128;"	d	file:
AIC31_P0_REG82	aic31.c	129;"	d	file:
AIC31_P0_REG83	aic31.c	130;"	d	file:
AIC31_P0_REG84	aic31.c	131;"	d	file:
AIC31_P0_REG85	aic31.c	132;"	d	file:
AIC31_P0_REG86	aic31.c	133;"	d	file:
AIC31_P0_REG87	aic31.c	134;"	d	file:
AIC31_P0_REG88	aic31.c	135;"	d	file:
AIC31_P0_REG89	aic31.c	136;"	d	file:
AIC31_P0_REG9	aic31.c	57;"	d	file:
AIC31_P0_REG90	aic31.c	137;"	d	file:
AIC31_P0_REG91	aic31.c	138;"	d	file:
AIC31_P0_REG92	aic31.c	139;"	d	file:
AIC31_P0_REG93	aic31.c	140;"	d	file:
AIC31_P0_REG94	aic31.c	141;"	d	file:
AIC31_P0_REG95	aic31.c	142;"	d	file:
AIC31_P0_REG96	aic31.c	143;"	d	file:
AIC31_P0_REG97	aic31.c	144;"	d	file:
AIC31_P0_REG98	aic31.c	145;"	d	file:
AIC31_P0_REG99	aic31.c	146;"	d	file:
AIC31_RESET	aic31.c	151;"	d	file:
AIC31_SLOT_WIDTH_16	aic31.c	153;"	d	file:
AIC31_SLOT_WIDTH_20	aic31.c	154;"	d	file:
AIC31_SLOT_WIDTH_24	aic31.c	155;"	d	file:
AIC31_SLOT_WIDTH_32	aic31.c	156;"	d	file:
ASM_DEPS	Debug\sources.mk	/^ASM_DEPS := $/;"	m
ASM_DEPS__QUOTED	Debug\sources.mk	/^ASM_DEPS__QUOTED := $/;"	m
ASM_SRCS	Debug\sources.mk	/^ASM_SRCS := $/;"	m
ASM_UPPER_DEPS	Debug\sources.mk	/^ASM_UPPER_DEPS := $/;"	m
ASM_UPPER_DEPS__QUOTED	Debug\sources.mk	/^ASM_UPPER_DEPS__QUOTED := $/;"	m
ASM_UPPER_SRCS	Debug\sources.mk	/^ASM_UPPER_SRCS := $/;"	m
AUDIO_BUF_SIZE	board.h	81;"	d
A_SRCS	Debug\sources.mk	/^A_SRCS := $/;"	m
AuIn2Float	main.c	/^float AuIn2Float(unsigned int in_val_i){$/;"	f
BYTES_PER_SAMPLE	board.h	78;"	d
C43_DEPS	Debug\sources.mk	/^C43_DEPS := $/;"	m
C43_DEPS__QUOTED	Debug\sources.mk	/^C43_DEPS__QUOTED := $/;"	m
C43_SRCS	Debug\sources.mk	/^C43_SRCS := $/;"	m
C55_DEPS	Debug\sources.mk	/^C55_DEPS := $/;"	m
C55_DEPS__QUOTED	Debug\sources.mk	/^C55_DEPS__QUOTED := $/;"	m
C55_SRCS	Debug\sources.mk	/^C55_SRCS := $/;"	m
C6000_EXECUTABLE_OUTPUTS	Debug\sources.mk	/^C6000_EXECUTABLE_OUTPUTS := $/;"	m
C6000_EXECUTABLE_OUTPUTS__QUOTED	Debug\sources.mk	/^C6000_EXECUTABLE_OUTPUTS__QUOTED := $/;"	m
C62_DEPS	Debug\sources.mk	/^C62_DEPS := $/;"	m
C62_DEPS__QUOTED	Debug\sources.mk	/^C62_DEPS__QUOTED := $/;"	m
C62_SRCS	Debug\sources.mk	/^C62_SRCS := $/;"	m
C64_DEPS	Debug\sources.mk	/^C64_DEPS := $/;"	m
C64_DEPS__QUOTED	Debug\sources.mk	/^C64_DEPS__QUOTED := $/;"	m
C64_SRCS	Debug\sources.mk	/^C64_SRCS := $/;"	m
C674X_GEE	drivers\interrupt.c	57;"	d	file:
C674X_INT_COUNT	drivers\interrupt.c	59;"	d	file:
C674X_NMI	drivers\interrupt.c	56;"	d	file:
C674X_XEN	drivers\interrupt.c	58;"	d	file:
C67_DEPS	Debug\sources.mk	/^C67_DEPS := $/;"	m
C67_DEPS__QUOTED	Debug\sources.mk	/^C67_DEPS__QUOTED := $/;"	m
C67_SRCS	Debug\sources.mk	/^C67_SRCS := $/;"	m
CC_DEPS	Debug\sources.mk	/^CC_DEPS := $/;"	m
CC_DEPS__QUOTED	Debug\sources.mk	/^CC_DEPS__QUOTED := $/;"	m
CC_SRCS	Debug\sources.mk	/^CC_SRCS := $/;"	m
CFGCHIP0	C6748_gel_reg.h	263;"	d
CFGCHIP2	C6748_gel_reg.h	264;"	d
CFGCHIP3	C6748_gel_reg.h	265;"	d
CLA_DEPS	Debug\sources.mk	/^CLA_DEPS := $/;"	m
CLA_DEPS__QUOTED	Debug\sources.mk	/^CLA_DEPS__QUOTED := $/;"	m
CLA_SRCS	Debug\sources.mk	/^CLA_SRCS := $/;"	m
CMD_SRCS	Debug\sources.mk	/^CMD_SRCS := $/;"	m
CMD_UPPER_SRCS	Debug\sources.mk	/^CMD_UPPER_SRCS := $/;"	m
CMP_IDX_MASK	drivers\timer.c	55;"	d	file:
CODEC_INTERFACE_I2C	codecif.h	48;"	d
CPP_DEPS	Debug\sources.mk	/^CPP_DEPS := $/;"	m
CPP_DEPS__QUOTED	Debug\sources.mk	/^CPP_DEPS__QUOTED := $/;"	m
CPP_SRCS	Debug\sources.mk	/^CPP_SRCS := $/;"	m
CXX_DEPS	Debug\sources.mk	/^CXX_DEPS := $/;"	m
CXX_DEPS__QUOTED	Debug\sources.mk	/^CXX_DEPS__QUOTED := $/;"	m
CXX_SRCS	Debug\sources.mk	/^CXX_SRCS := $/;"	m
C_DEPS	Debug\sources.mk	/^C_DEPS := $/;"	m
C_DEPS__QUOTED	Debug\sources.mk	/^C_DEPS__QUOTED := $/;"	m
C_SRCS	Debug\sources.mk	/^C_SRCS := $/;"	m
C_UPPER_DEPS	Debug\sources.mk	/^C_UPPER_DEPS := $/;"	m
C_UPPER_DEPS__QUOTED	Debug\sources.mk	/^C_UPPER_DEPS__QUOTED := $/;"	m
C_UPPER_SRCS	Debug\sources.mk	/^C_UPPER_SRCS := $/;"	m
CodecRegBitClr	codecif.c	/^void CodecRegBitClr(unsigned int baseAddr, unsigned char regAddr,    $/;"	f
CodecRegBitSet	codecif.c	/^void CodecRegBitSet(unsigned int baseAddr, unsigned char regAddr, $/;"	f
CodecRegRead	codecif.c	/^unsigned char CodecRegRead(unsigned int baseAddr, unsigned char regAddr)$/;"	f
CodecRegWrite	codecif.c	/^void CodecRegWrite(unsigned int baseAddr, unsigned char regAddr,$/;"	f
DBG_DMA_LEN	board.c	6;"	d	file:
DDR2	C6748_gel_reg.h	195;"	d
DDRPHYREV	C6748_gel_reg.h	192;"	d
DDR_DEBUG	C6748_gel_reg.h	198;"	d
DEVICE_DDRConfig	C6748_gel.c	/^void DEVICE_DDRConfig(unsigned int ddr_type, unsigned int freq)$/;"	f
DRPYC1R	C6748_gel_reg.h	193;"	d
EDMA3CCComplIsr	board.c	/^void EDMA3CCComplIsr(void) $/;"	f
EDMA3ChannelToParamMap	drivers\edma.c	/^void EDMA3ChannelToParamMap(unsigned int baseAdd,$/;"	f
EDMA3ClearErrorBits	drivers\edma.c	/^void EDMA3ClearErrorBits(unsigned int baseAdd, $/;"	f
EDMA3ClrCCErr	drivers\edma.c	/^void EDMA3ClrCCErr(unsigned int baseAdd, $/;"	f
EDMA3ClrEvt	drivers\edma.c	/^void EDMA3ClrEvt(unsigned int baseAdd, $/;"	f
EDMA3ClrIntr	drivers\edma.c	/^void EDMA3ClrIntr(unsigned int baseAdd, unsigned int value)$/;"	f
EDMA3ClrMissEvt	drivers\edma.c	/^void EDMA3ClrMissEvt(unsigned int baseAdd, $/;"	f
EDMA3ContextRestore	drivers\edma.c	/^void EDMA3ContextRestore(unsigned int baseAddr, EDMACONTEXT *edmaCntxPtr)$/;"	f
EDMA3ContextSave	drivers\edma.c	/^void EDMA3ContextSave(unsigned int baseAddr, EDMACONTEXT *edmaCntxPtr)$/;"	f
EDMA3Deinit	drivers\edma.c	/^void EDMA3Deinit(unsigned int baseAdd,$/;"	f
EDMA3DisableChInShadowReg	drivers\edma.c	/^void EDMA3DisableChInShadowReg(unsigned int baseAdd, $/;"	f
EDMA3DisableDmaEvt	drivers\edma.c	/^void EDMA3DisableDmaEvt(unsigned int baseAdd, $/;"	f
EDMA3DisableEvtIntr	drivers\edma.c	/^void EDMA3DisableEvtIntr(unsigned int baseAdd, $/;"	f
EDMA3DisableQdmaEvt	drivers\edma.c	/^void EDMA3DisableQdmaEvt(unsigned int baseAdd, $/;"	f
EDMA3DisableTransfer	drivers\edma.c	/^unsigned int EDMA3DisableTransfer(unsigned int baseAdd, $/;"	f
EDMA3EnableChInShadowReg	drivers\edma.c	/^void EDMA3EnableChInShadowReg(unsigned int baseAdd, $/;"	f
EDMA3EnableDmaEvt	drivers\edma.c	/^void EDMA3EnableDmaEvt(unsigned int baseAdd, $/;"	f
EDMA3EnableEvtIntr	drivers\edma.c	/^void EDMA3EnableEvtIntr(unsigned int baseAdd, $/;"	f
EDMA3EnableQdmaEvt	drivers\edma.c	/^void EDMA3EnableQdmaEvt(unsigned int baseAdd, $/;"	f
EDMA3EnableTransfer	drivers\edma.c	/^unsigned int EDMA3EnableTransfer(unsigned int baseAdd, $/;"	f
EDMA3ErrIntrHighStatusGet	drivers\edma.c	/^unsigned int EDMA3ErrIntrHighStatusGet(unsigned int baseAdd)$/;"	f
EDMA3FreeChannel	drivers\edma.c	/^unsigned int EDMA3FreeChannel(unsigned int baseAdd, unsigned int chType, $/;"	f
EDMA3GetCCErrStatus	drivers\edma.c	/^unsigned int EDMA3GetCCErrStatus(unsigned int baseAdd)$/;"	f
EDMA3GetErrIntrStatus	drivers\edma.c	/^unsigned int EDMA3GetErrIntrStatus(unsigned int baseAdd)$/;"	f
EDMA3GetIntrStatus	drivers\edma.c	/^unsigned int EDMA3GetIntrStatus(unsigned int baseAdd)$/;"	f
EDMA3GetPaRAM	drivers\edma.c	/^void EDMA3GetPaRAM(unsigned int baseAdd, $/;"	f
EDMA3Init	drivers\edma.c	/^void EDMA3Init(unsigned int baseAdd,$/;"	f
EDMA3IntSetup	board.c	/^void EDMA3IntSetup(void)$/;"	f
EDMA3IntrStatusHighGet	drivers\edma.c	/^unsigned int EDMA3IntrStatusHighGet(unsigned int baseAdd)$/;"	f
EDMA3MapChToEvtQ	drivers\edma.c	/^void EDMA3MapChToEvtQ(unsigned int baseAdd, $/;"	f
EDMA3MapQdmaChToPaRAM	drivers\edma.c	/^void EDMA3MapQdmaChToPaRAM(unsigned int baseAdd,$/;"	f
EDMA3PeripheralIdGet	drivers\edma.c	/^unsigned int EDMA3PeripheralIdGet(unsigned int baseAdd)$/;"	f
EDMA3QdmaClrMissEvt	drivers\edma.c	/^void EDMA3QdmaClrMissEvt(unsigned int baseAdd, $/;"	f
EDMA3QdmaGetErrIntrStatus	drivers\edma.c	/^unsigned int EDMA3QdmaGetErrIntrStatus(unsigned int baseAdd)$/;"	f
EDMA3QdmaGetPaRAM	drivers\edma.c	/^void EDMA3QdmaGetPaRAM(unsigned int baseAdd, $/;"	f
EDMA3QdmaGetPaRAMEntry	drivers\edma.c	/^unsigned int EDMA3QdmaGetPaRAMEntry(unsigned int baseAdd,$/;"	f
EDMA3QdmaSetPaRAM	drivers\edma.c	/^void EDMA3QdmaSetPaRAM(unsigned int baseAdd, $/;"	f
EDMA3QdmaSetPaRAMEntry	drivers\edma.c	/^void EDMA3QdmaSetPaRAMEntry(unsigned int baseAdd,$/;"	f
EDMA3RequestChannel	drivers\edma.c	/^unsigned int EDMA3RequestChannel(unsigned int baseAdd, $/;"	f
EDMA3SetEvt	drivers\edma.c	/^void EDMA3SetEvt(unsigned int baseAdd, $/;"	f
EDMA3SetPaRAM	drivers\edma.c	/^void EDMA3SetPaRAM(unsigned int baseAdd, $/;"	f
EDMA3SetQdmaTrigWord	drivers\edma.c	/^void EDMA3SetQdmaTrigWord(unsigned int baseAdd,$/;"	f
EDMA3UnmapChToEvtQ	drivers\edma.c	/^void EDMA3UnmapChToEvtQ(unsigned int baseAdd, $/;"	f
EDMAVersionGet	drivers\LCDK_6748_edma.c	/^unsigned int EDMAVersionGet(void)$/;"	f
EMIFA	C6748_gel_reg.h	208;"	d
EMIFA_ACFG2	C6748_gel_reg.h	213;"	d
EMIFA_ACFG3	C6748_gel_reg.h	214;"	d
EMIFA_ACFG4	C6748_gel_reg.h	215;"	d
EMIFA_ACFG5	C6748_gel_reg.h	216;"	d
EMIFA_AWAITCFG	C6748_gel_reg.h	210;"	d
EMIFA_BASE_ADDR	C6748_gel_reg.h	201;"	d
EMIFA_CS2_BASE_ADDR	C6748_gel_reg.h	202;"	d
EMIFA_CS3_BASE_ADDR	C6748_gel_reg.h	203;"	d
EMIFA_CS4_BASE_ADDR	C6748_gel_reg.h	204;"	d
EMIFA_CS5_BASE_ADDR	C6748_gel_reg.h	205;"	d
EMIFA_NANDFCR	C6748_gel_reg.h	219;"	d
EMIFA_SDCFG	C6748_gel_reg.h	211;"	d
EMIFA_SDREF	C6748_gel_reg.h	212;"	d
EMIFA_SDTIM	C6748_gel_reg.h	217;"	d
EMIFA_SRPD	C6748_gel_reg.h	218;"	d
EMIFDDR_BASE_ADDR	C6748_gel_reg.h	200;"	d
EMIFDDR_IMCR	C6748_gel_reg.h	191;"	d
EMIFDDR_IMR	C6748_gel_reg.h	189;"	d
EMIFDDR_IMSR	C6748_gel_reg.h	190;"	d
EMIFDDR_IRR	C6748_gel_reg.h	188;"	d
EMIFDDR_PBBPR	C6748_gel_reg.h	185;"	d
EMIFDDR_REVID	C6748_gel_reg.h	178;"	d
EMIFDDR_SDCR	C6748_gel_reg.h	180;"	d
EMIFDDR_SDCR2	C6748_gel_reg.h	184;"	d
EMIFDDR_SDRAM_CFG	C6748_gel_reg.h	177;"	d
EMIFDDR_SDRCR	C6748_gel_reg.h	181;"	d
EMIFDDR_SDRSTAT	C6748_gel_reg.h	179;"	d
EMIFDDR_SDTIMR1	C6748_gel_reg.h	182;"	d
EMIFDDR_SDTIMR2	C6748_gel_reg.h	183;"	d
EMIFDDR_VBUSMCFG1	C6748_gel_reg.h	186;"	d
EMIFDDR_VBUSMCFG2	C6748_gel_reg.h	187;"	d
ExcCombineAdd	drivers\interrupt.c	/^void ExcCombineAdd(unsigned int sysINT)$/;"	f
ExcCombineRemove	drivers\interrupt.c	/^void ExcCombineRemove(unsigned int sysINT)$/;"	f
ExcGlobalEnable	drivers\interrupt.c	/^void ExcGlobalEnable (void)$/;"	f
Float2AuOut	main.c	/^unsigned int Float2AuOut(float in_val_f){$/;"	f
GPIO_BANK01_BASE	C6748_gel_reg.h	228;"	d
GPIO_BANK23_BASE	C6748_gel_reg.h	229;"	d
GPIO_BANK23_CLR	C6748_gel_reg.h	236;"	d
GPIO_BANK23_DAT	C6748_gel_reg.h	234;"	d
GPIO_BANK23_DIR	C6748_gel_reg.h	233;"	d
GPIO_BANK23_SET	C6748_gel_reg.h	235;"	d
GPIO_BANK45_BASE	C6748_gel_reg.h	230;"	d
GPIO_BANK67_BASE	C6748_gel_reg.h	231;"	d
GPIO_BANK8_BASE	C6748_gel_reg.h	232;"	d
GPIO_BANK_OFFSET	C6748_gel_reg.h	223;"	d
GPIO_BINTEN	C6748_gel_reg.h	227;"	d
GPIO_CLR_OFFSET	C6748_gel_reg.h	226;"	d
GPIO_DAT_OFFSET	C6748_gel_reg.h	224;"	d
GPIO_REG_BASE	C6748_gel_reg.h	222;"	d
GPIO_SET_OFFSET	C6748_gel_reg.h	225;"	d
HOST0CFG	C6748_gel_reg.h	240;"	d
I2CCodecIfInit	codecif.c	/^void I2CCodecIfInit(unsigned int baseAddr, unsigned int intCh, $/;"	f
I2CCodecIntSetup	codecif.c	/^static void I2CCodecIntSetup(unsigned int sysIntNum, unsigned int channel)$/;"	f	file:
I2CCodecIsr	codecif.c	/^void I2CCodecIsr(void)$/;"	f
I2CCodecRcvBlocking	codecif.c	/^static void I2CCodecRcvBlocking(unsigned int baseAddr, unsigned int dataCnt)$/;"	f	file:
I2CCodecSendBlocking	codecif.c	/^static void I2CCodecSendBlocking(unsigned int baseAddr, unsigned int dataCnt)$/;"	f	file:
I2CDMARxEventDisable	drivers\i2c.c	/^void I2CDMARxEventDisable(unsigned int baseAddr)$/;"	f
I2CDMARxEventEnable	drivers\i2c.c	/^void I2CDMARxEventEnable(unsigned int baseAddr)$/;"	f
I2CDMATxEventDisable	drivers\i2c.c	/^void I2CDMATxEventDisable(unsigned int baseAddr)$/;"	f
I2CDMATxEventEnable	drivers\i2c.c	/^void I2CDMATxEventEnable(unsigned int baseAddr)$/;"	f
I2CDMATxRxEventDisable	drivers\i2c.c	/^void I2CDMATxRxEventDisable(unsigned int baseAddr)$/;"	f
I2CInterruptVectorGet	drivers\i2c.c	/^unsigned int I2CInterruptVectorGet(unsigned int baseAddr)$/;"	f
I2CMasterBusBusy	drivers\i2c.c	/^unsigned int  I2CMasterBusBusy(unsigned int baseAddr)$/;"	f
I2CMasterControl	drivers\i2c.c	/^void I2CMasterControl(unsigned int baseAddr, unsigned int cmd)$/;"	f
I2CMasterDataGet	drivers\i2c.c	/^unsigned int I2CMasterDataGet(unsigned int baseAddr)$/;"	f
I2CMasterDataPut	drivers\i2c.c	/^void I2CMasterDataPut(unsigned int baseAddr, unsigned char data)$/;"	f
I2CMasterDisable	drivers\i2c.c	/^void I2CMasterDisable(unsigned int baseAddr)$/;"	f
I2CMasterEnable	drivers\i2c.c	/^void I2CMasterEnable(unsigned int baseAddr)$/;"	f
I2CMasterErr	drivers\i2c.c	/^unsigned int I2CMasterErr(unsigned int baseAddr)$/;"	f
I2CMasterInitExpClk	drivers\i2c.c	/^void I2CMasterInitExpClk(unsigned int baseAdd, unsigned int inputClk,$/;"	f
I2CMasterIntClearEx	drivers\i2c.c	/^void I2CMasterIntClearEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CMasterIntDisableEx	drivers\i2c.c	/^void I2CMasterIntDisableEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CMasterIntEnableEx	drivers\i2c.c	/^void I2CMasterIntEnableEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CMasterIntStatus	drivers\i2c.c	/^unsigned int I2CMasterIntStatus(unsigned int baseAddr)$/;"	f
I2CMasterIsBusy	drivers\i2c.c	/^unsigned int  I2CMasterIsBusy(unsigned int baseAddr)$/;"	f
I2CMasterSlaveAddrSet	drivers\i2c.c	/^void I2CMasterSlaveAddrSet(unsigned int baseAddr, unsigned int slaveAddr)$/;"	f
I2CMasterStart	drivers\i2c.c	/^void I2CMasterStart(unsigned int baseAddr)$/;"	f
I2CMasterStop	drivers\i2c.c	/^void I2CMasterStop(unsigned int baseAddr)$/;"	f
I2COwnAddressSet	drivers\i2c.c	/^void I2COwnAddressSet(unsigned int baseAddr)$/;"	f
I2CPinMuxSetup	drivers\LCDK_6748_i2c.c	/^void I2CPinMuxSetup(unsigned int instanceNum)$/;"	f
I2CSetDataCount	drivers\i2c.c	/^void I2CSetDataCount(unsigned int baseAddr, unsigned int count)$/;"	f
I2CSlaveAddressGet	drivers\i2c.c	/^unsigned int I2CSlaveAddressGet(unsigned int baseAddr)$/;"	f
I2CSlaveDataGet	drivers\i2c.c	/^unsigned int I2CSlaveDataGet(unsigned int baseAddr)$/;"	f
I2CSlaveDataPut	drivers\i2c.c	/^void I2CSlaveDataPut(unsigned int baseAddr, unsigned char data)$/;"	f
I2CSlaveIntClearEx	drivers\i2c.c	/^void I2CSlaveIntClearEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CSlaveIntDisableEx	drivers\i2c.c	/^void I2CSlaveIntDisableEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CSlaveIntEnableEx	drivers\i2c.c	/^void I2CSlaveIntEnableEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CSlaveIntStatus	drivers\i2c.c	/^unsigned int I2CSlaveIntStatus(unsigned int baseAddr)$/;"	f
I2CSlaveIntStatusEx	drivers\i2c.c	/^unsigned int I2CSlaveIntStatusEx(unsigned int baseAddr, unsigned int intFlag)$/;"	f
I2CStatusClear	drivers\i2c.c	/^void I2CStatusClear(unsigned int baseAddr, unsigned int status)$/;"	f
I2C_SLAVE_CODEC_AIC31	board.h	56;"	d
I2C_TX_RX_EVENT_DISABLE	drivers\i2c.c	49;"	d	file:
I2SDMAParamInit	board.c	/^void I2SDMAParamInit(void)$/;"	f
I2SDataTxRxActivate	board.c	/^void I2SDataTxRxActivate(void)$/;"	f
I2S_SLOTS	board.h	76;"	d
INT_CHANNEL_EDMACC	board.h	61;"	d
INT_CHANNEL_I2C	board.h	59;"	d
INT_CHANNEL_MCASP	board.h	60;"	d
IntDSPINTCInit	drivers\interrupt.c	/^ void IntDSPINTCInit (void)$/;"	f
IntDefaultHandler	drivers\interrupt.c	/^static void IntDefaultHandler (void)$/;"	f	file:
IntDisable	drivers\interrupt.c	/^void IntDisable (unsigned int cpuINT)$/;"	f
IntEnable	drivers\interrupt.c	/^void IntEnable (unsigned int cpuINT)$/;"	f
IntEventClear	drivers\interrupt.c	/^void IntEventClear(unsigned int sysINT)$/;"	f
IntEventCombineAdd	drivers\interrupt.c	/^void IntEventCombineAdd(unsigned int sysINT)$/;"	f
IntEventCombineInit	drivers\interrupt.c	/^void IntEventCombineInit(int ecmINT0, int ecmINT1, int ecmINT2, int ecmINT3)$/;"	f
IntEventCombineIsr0	drivers\interrupt.c	/^static void IntEventCombineIsr0 (void)$/;"	f	file:
IntEventCombineIsr1	drivers\interrupt.c	/^static void IntEventCombineIsr1 (void)$/;"	f	file:
IntEventCombineIsr2	drivers\interrupt.c	/^static void IntEventCombineIsr2 (void)$/;"	f	file:
IntEventCombineIsr3	drivers\interrupt.c	/^static void IntEventCombineIsr3 (void)$/;"	f	file:
IntEventCombineRegister	drivers\interrupt.c	/^void IntEventCombineRegister(unsigned int sysINT, void (*userISR)(void))$/;"	f
IntEventCombineRemove	drivers\interrupt.c	/^void IntEventCombineRemove(unsigned int sysINT)$/;"	f
IntEventCombinerDispatch	drivers\interrupt.c	/^static void IntEventCombinerDispatch (unsigned int evtReg)$/;"	f	file:
IntEventMap	drivers\interrupt.c	/^void IntEventMap (unsigned int cpuINT, unsigned int sysINT)$/;"	f
IntEventSet	drivers\interrupt.c	/^void IntEventSet (unsigned int sysINT)$/;"	f
IntGlobalDisable	drivers\interrupt.c	/^unsigned int IntGlobalDisable (void)$/;"	f
IntGlobalEnable	drivers\interrupt.c	/^void IntGlobalEnable (void)$/;"	f
IntGlobalRestore	drivers\interrupt.c	/^void IntGlobalRestore (unsigned int restoreValue)$/;"	f
IntRegister	drivers\interrupt.c	/^void IntRegister (unsigned int cpuINT, void (*userISR)(void))$/;"	f
IntReset	drivers\interrupt.c	/^void IntReset (void)$/;"	f
IntUnRegister	drivers\interrupt.c	/^void IntUnRegister (unsigned int cpuINT)$/;"	f
KICK0R	C6748_gel_reg.h	241;"	d
KICK1R	C6748_gel_reg.h	242;"	d
K_DEPS	Debug\sources.mk	/^K_DEPS := $/;"	m
K_DEPS__QUOTED	Debug\sources.mk	/^K_DEPS__QUOTED := $/;"	m
K_SRCS	Debug\sources.mk	/^K_SRCS := $/;"	m
LD_SRCS	Debug\sources.mk	/^LD_SRCS := $/;"	m
LD_UPPER_SRCS	Debug\sources.mk	/^LD_UPPER_SRCS := $/;"	m
LIBS	Debug\objects.mk	/^LIBS := $(GEN_CMDS__FLAG) -l"libc.a" -l"C:\/ti\/ccsv5\/tools\/compiler\/c6000_7.4.1\/lib\/rts6740.lib"$/;"	m
LIB_SRCS	Debug\sources.mk	/^LIB_SRCS := $/;"	m
LPSC_ARM	C6748_gel_reg.h	140;"	d
LPSC_ARM_AINTC	C6748_gel_reg.h	132;"	d
LPSC_ARM_RAMROM	C6748_gel_reg.h	133;"	d
LPSC_BR_F7	C6748_gel_reg.h	172;"	d
LPSC_DDR	C6748_gel_reg.h	149;"	d
LPSC_DSP	C6748_gel_reg.h	141;"	d
LPSC_ECAP	C6748_gel_reg.h	163;"	d
LPSC_EDMA_CC0	C6748_gel_reg.h	126;"	d
LPSC_EDMA_CC1	C6748_gel_reg.h	143;"	d
LPSC_EDMA_TC0	C6748_gel_reg.h	127;"	d
LPSC_EDMA_TC1	C6748_gel_reg.h	128;"	d
LPSC_EDMA_TC2	C6748_gel_reg.h	164;"	d
LPSC_EMAC	C6748_gel_reg.h	148;"	d
LPSC_EMIFA	C6748_gel_reg.h	129;"	d
LPSC_EPWM	C6748_gel_reg.h	160;"	d
LPSC_GPIO	C6748_gel_reg.h	146;"	d
LPSC_I2C1	C6748_gel_reg.h	154;"	d
LPSC_LCDC	C6748_gel_reg.h	159;"	d
LPSC_MCASP0	C6748_gel_reg.h	150;"	d
LPSC_MCBSP0	C6748_gel_reg.h	157;"	d
LPSC_MCBSP1	C6748_gel_reg.h	158;"	d
LPSC_MMCSD0	C6748_gel_reg.h	131;"	d
LPSC_MMCSD1	C6748_gel_reg.h	161;"	d
LPSC_SATA	C6748_gel_reg.h	151;"	d
LPSC_SCR0	C6748_gel_reg.h	136;"	d
LPSC_SCR1	C6748_gel_reg.h	137;"	d
LPSC_SCR2	C6748_gel_reg.h	138;"	d
LPSC_SCR_F0	C6748_gel_reg.h	166;"	d
LPSC_SCR_F1	C6748_gel_reg.h	167;"	d
LPSC_SCR_F2	C6748_gel_reg.h	168;"	d
LPSC_SCR_F6	C6748_gel_reg.h	169;"	d
LPSC_SCR_F7	C6748_gel_reg.h	170;"	d
LPSC_SCR_F8	C6748_gel_reg.h	171;"	d
LPSC_SHARED_RAM	C6748_gel_reg.h	173;"	d
LPSC_SPI0	C6748_gel_reg.h	130;"	d
LPSC_SPI1	C6748_gel_reg.h	153;"	d
LPSC_UART0	C6748_gel_reg.h	135;"	d
LPSC_UART1	C6748_gel_reg.h	155;"	d
LPSC_UART2	C6748_gel_reg.h	156;"	d
LPSC_UHPI	C6748_gel_reg.h	147;"	d
LPSC_UPP	C6748_gel_reg.h	162;"	d
LPSC_USB11	C6748_gel_reg.h	145;"	d
LPSC_USB20	C6748_gel_reg.h	144;"	d
LPSC_VPIF	C6748_gel_reg.h	152;"	d
MCASP_XSER_RX	board.h	64;"	d
MCASP_XSER_TX	board.h	67;"	d
MDDR	C6748_gel_reg.h	196;"	d
McASPAMUTEINActivate	drivers\mcasp.c	/^void McASPAMUTEINActivate(unsigned int baseAddr, unsigned int polarity)$/;"	f
McASPAMuteDisable	drivers\mcasp.c	/^void McASPAMuteDisable(unsigned int baseAddr)$/;"	f
McASPAMuteEnable	drivers\mcasp.c	/^void McASPAMuteEnable(unsigned int baseAddr, unsigned int errFlags,$/;"	f
McASPContextRestore	drivers\mcasp.c	/^void McASPContextRestore(unsigned int baseAddrCtrl, unsigned int baseAddrFifo,$/;"	f
McASPContextSave	drivers\mcasp.c	/^void McASPContextSave(unsigned int baseAddrCtrl, unsigned int baseAddrFifo,$/;"	f
McASPDITChanStatRead	drivers\mcasp.c	/^unsigned int McASPDITChanStatRead(unsigned int baseAddr, $/;"	f
McASPDITChanStatWrite	drivers\mcasp.c	/^void McASPDITChanStatWrite(unsigned int baseAddr, unsigned int chStatBits, $/;"	f
McASPDITChanUsrDataRead	drivers\mcasp.c	/^unsigned int McASPDITChanUsrDataRead(unsigned int baseAddr, $/;"	f
McASPDITChanUsrDataWrite	drivers\mcasp.c	/^void McASPDITChanUsrDataWrite(unsigned int baseAddr, unsigned int chUsrDataBits, $/;"	f
McASPDITDisable	drivers\mcasp.c	/^void McASPDITDisable(unsigned int baseAddr)$/;"	f
McASPDITEnable	drivers\mcasp.c	/^void McASPDITEnable(unsigned int baseAddr, unsigned int vBit)$/;"	f
McASPErrorIntSetup	board.c	/^void McASPErrorIntSetup(void)$/;"	f
McASPErrorIsr	board.c	/^void McASPErrorIsr(void)$/;"	f
McASPI2SConfigure	board.c	/^void McASPI2SConfigure(void)$/;"	f
McASPPinDirInputSet	drivers\mcasp.c	/^void McASPPinDirInputSet(unsigned int baseAddr, unsigned int pinMask)$/;"	f
McASPPinDirOutputSet	drivers\mcasp.c	/^void McASPPinDirOutputSet(unsigned int baseAddr, unsigned int pinMask)$/;"	f
McASPPinGPIOSet	drivers\mcasp.c	/^void McASPPinGPIOSet(unsigned int baseAddr, unsigned int pinMask)$/;"	f
McASPPinMcASPSet	drivers\mcasp.c	/^void McASPPinMcASPSet(unsigned int baseAddr, unsigned int pinMask)$/;"	f
McASPPinMuxSetup	drivers\LCDK_6748_mcasp.c	/^void McASPPinMuxSetup(void)$/;"	f
McASPReadFifoEnable	drivers\mcasp.c	/^void McASPReadFifoEnable(unsigned int baseAddr, unsigned int numRxSer, $/;"	f
McASPRxBufRead	drivers\mcasp.c	/^unsigned int McASPRxBufRead(unsigned int baseAddr, unsigned int serNum)$/;"	f
McASPRxClkCfg	drivers\mcasp.c	/^void McASPRxClkCfg(unsigned int baseAddr, unsigned int clkSrc,$/;"	f
McASPRxClkCheckConfig	drivers\mcasp.c	/^void McASPRxClkCheckConfig(unsigned int baseAddr, unsigned int clkDiv,$/;"	f
McASPRxClkPolaritySet	drivers\mcasp.c	/^void McASPRxClkPolaritySet(unsigned int baseAddr, unsigned int polarity)$/;"	f
McASPRxClkStart	drivers\mcasp.c	/^void McASPRxClkStart(unsigned int baseAddr, unsigned int clkSrc)$/;"	f
McASPRxDMAComplHandler	board.c	/^void McASPRxDMAComplHandler(void)$/;"	f
McASPRxEnable	drivers\mcasp.c	/^void McASPRxEnable(unsigned int baseAddr)$/;"	f
McASPRxFmtI2SSet	drivers\mcasp.c	/^void McASPRxFmtI2SSet(unsigned int baseAddr, unsigned int wordSize, $/;"	f
McASPRxFmtMaskSet	drivers\mcasp.c	/^void McASPRxFmtMaskSet(unsigned int baseAddr, unsigned int mask)$/;"	f
McASPRxFmtSet	drivers\mcasp.c	/^void McASPRxFmtSet(unsigned int baseAddr, unsigned int formatVal)$/;"	f
McASPRxFrameSyncCfg	drivers\mcasp.c	/^void McASPRxFrameSyncCfg(unsigned int baseAddr, unsigned int fsMode, $/;"	f
McASPRxHFClkPolaritySet	drivers\mcasp.c	/^void McASPRxHFClkPolaritySet(unsigned int baseAddr, unsigned int polarity)$/;"	f
McASPRxIntDisable	drivers\mcasp.c	/^void McASPRxIntDisable(unsigned int baseAddr, unsigned int intMask)$/;"	f
McASPRxIntEnable	drivers\mcasp.c	/^void McASPRxIntEnable(unsigned int baseAddr, unsigned int intMask)$/;"	f
McASPRxReset	drivers\mcasp.c	/^void McASPRxReset(unsigned int baseAddr)$/;"	f
McASPRxSerActivate	drivers\mcasp.c	/^void McASPRxSerActivate(unsigned int baseAddr)$/;"	f
McASPRxStatusGet	drivers\mcasp.c	/^unsigned int McASPRxStatusGet(unsigned int baseAddr)$/;"	f
McASPRxTimeSlotSet	drivers\mcasp.c	/^void McASPRxTimeSlotSet(unsigned int baseAddr, unsigned int slotMask)$/;"	f
McASPSerializerInactivate	drivers\mcasp.c	/^void McASPSerializerInactivate(unsigned int baseAddr, unsigned int serNum)$/;"	f
McASPSerializerRxSet	drivers\mcasp.c	/^void McASPSerializerRxSet(unsigned int baseAddr, unsigned int serNum)$/;"	f
McASPSerializerTxSet	drivers\mcasp.c	/^void McASPSerializerTxSet(unsigned int baseAddr, unsigned int serNum)$/;"	f
McASPTxBufWrite	drivers\mcasp.c	/^void McASPTxBufWrite(unsigned int baseAddr, unsigned int serNum, $/;"	f
McASPTxClkCfg	drivers\mcasp.c	/^void McASPTxClkCfg(unsigned int baseAddr, unsigned int clkSrc,$/;"	f
McASPTxClkCheckConfig	drivers\mcasp.c	/^void McASPTxClkCheckConfig(unsigned int baseAddr, unsigned int clkDiv,$/;"	f
McASPTxClkPolaritySet	drivers\mcasp.c	/^void McASPTxClkPolaritySet(unsigned int baseAddr, unsigned int polarity)$/;"	f
McASPTxClkStart	drivers\mcasp.c	/^void McASPTxClkStart(unsigned int baseAddr, unsigned int clkSrc)$/;"	f
McASPTxDMAComplHandler	board.c	/^void McASPTxDMAComplHandler(void)$/;"	f
McASPTxEnable	drivers\mcasp.c	/^void McASPTxEnable(unsigned int baseAddr)$/;"	f
McASPTxFmtI2SSet	drivers\mcasp.c	/^void McASPTxFmtI2SSet(unsigned int baseAddr, unsigned int wordSize, $/;"	f
McASPTxFmtMaskSet	drivers\mcasp.c	/^void McASPTxFmtMaskSet(unsigned int baseAddr, unsigned int mask)$/;"	f
McASPTxFmtSet	drivers\mcasp.c	/^void McASPTxFmtSet(unsigned int baseAddr, unsigned int formatVal)$/;"	f
McASPTxFrameSyncCfg	drivers\mcasp.c	/^void McASPTxFrameSyncCfg(unsigned int baseAddr, unsigned int fsMode, $/;"	f
McASPTxHFClkPolaritySet	drivers\mcasp.c	/^void McASPTxHFClkPolaritySet(unsigned int baseAddr, unsigned int polarity)$/;"	f
McASPTxIntDisable	drivers\mcasp.c	/^void McASPTxIntDisable(unsigned int baseAddr, unsigned int intMask)$/;"	f
McASPTxIntEnable	drivers\mcasp.c	/^void McASPTxIntEnable(unsigned int baseAddr, unsigned int intMask)$/;"	f
McASPTxReset	drivers\mcasp.c	/^void McASPTxReset(unsigned int baseAddr)$/;"	f
McASPTxRxClkSyncDisable	drivers\mcasp.c	/^void McASPTxRxClkSyncDisable(unsigned int baseAddr)$/;"	f
McASPTxRxClkSyncEnable	drivers\mcasp.c	/^void McASPTxRxClkSyncEnable(unsigned int baseAddr)$/;"	f
McASPTxSerActivate	drivers\mcasp.c	/^void McASPTxSerActivate(unsigned int baseAddr)$/;"	f
McASPTxStatusGet	drivers\mcasp.c	/^unsigned int McASPTxStatusGet(unsigned int baseAddr)$/;"	f
McASPTxTimeSlotSet	drivers\mcasp.c	/^void McASPTxTimeSlotSet(unsigned int baseAddr, unsigned int slotMask)$/;"	f
McASPWriteFifoEnable	drivers\mcasp.c	/^void McASPWriteFifoEnable(unsigned int baseAddr, unsigned int numTxSer, $/;"	f
NUM_BUF	board.h	43;"	d
NUM_BUF_PAM	board.h	44;"	d
NUM_I2S_CHANNELS	board.h	37;"	d
NUM_PAR	board.h	47;"	d
NUM_RX_SERIALIZERS	board.h	74;"	d
NUM_SAMPLES_LOOP_BUF	board.h	53;"	d
NUM_SAMPLES_PER_AUDIO_BUF	board.h	40;"	d
NUM_SAMPLES_PER_AUDIO_CH	main.c	54;"	d	file:
NUM_SYS_EVENTS	drivers\interrupt.c	60;"	d	file:
NUM_TX_SERIALIZERS	board.h	72;"	d
OBJS	Debug\sources.mk	/^OBJS := $/;"	m
OBJS__QUOTED	Debug\sources.mk	/^OBJS__QUOTED := $/;"	m
OBJ_SRCS	Debug\sources.mk	/^OBJ_SRCS := $/;"	m
OPT_DEPS	Debug\sources.mk	/^OPT_DEPS := $/;"	m
OPT_DEPS__QUOTED	Debug\sources.mk	/^OPT_DEPS__QUOTED := $/;"	m
OPT_FIFO_WIDTH	board.h	96;"	d
OPT_SRCS	Debug\sources.mk	/^OPT_SRCS := $/;"	m
O_SRCS	Debug\sources.mk	/^O_SRCS := $/;"	m
PAR_ID_START	board.h	50;"	d
PAR_RX_START	board.h	89;"	d
PAR_TX_START	board.h	90;"	d
PD0	C6748_gel_reg.h	266;"	d
PD1	C6748_gel_reg.h	267;"	d
PINMUX0	C6748_gel_reg.h	243;"	d
PINMUX0_MCASP0_ACLKR_ENABLE	drivers\LCDK_6748_mcasp.c	58;"	d	file:
PINMUX0_MCASP0_ACLKX_ENABLE	drivers\LCDK_6748_mcasp.c	61;"	d	file:
PINMUX0_MCASP0_AFSR_ENABLE	drivers\LCDK_6748_mcasp.c	64;"	d	file:
PINMUX0_MCASP0_AFSX_ENABLE	drivers\LCDK_6748_mcasp.c	67;"	d	file:
PINMUX0_MCASP0_AHCLKR_ENABLE	drivers\LCDK_6748_mcasp.c	70;"	d	file:
PINMUX0_MCASP0_AHCLKX_ENABLE	drivers\LCDK_6748_mcasp.c	73;"	d	file:
PINMUX0_MCASP0_AMUTE_ENABLE	drivers\LCDK_6748_mcasp.c	76;"	d	file:
PINMUX1	C6748_gel_reg.h	244;"	d
PINMUX10	C6748_gel_reg.h	253;"	d
PINMUX11	C6748_gel_reg.h	254;"	d
PINMUX12	C6748_gel_reg.h	255;"	d
PINMUX13	C6748_gel_reg.h	256;"	d
PINMUX14	C6748_gel_reg.h	257;"	d
PINMUX15	C6748_gel_reg.h	258;"	d
PINMUX16	C6748_gel_reg.h	259;"	d
PINMUX17	C6748_gel_reg.h	260;"	d
PINMUX18	C6748_gel_reg.h	261;"	d
PINMUX19	C6748_gel_reg.h	262;"	d
PINMUX1_MCASP0_AXR13_ENABLE	drivers\LCDK_6748_mcasp.c	81;"	d	file:
PINMUX1_MCASP0_AXR14_ENABLE	drivers\LCDK_6748_mcasp.c	84;"	d	file:
PINMUX2	C6748_gel_reg.h	245;"	d
PINMUX3	C6748_gel_reg.h	246;"	d
PINMUX4	C6748_gel_reg.h	247;"	d
PINMUX4_I2C0_SCL_ENABLE	drivers\LCDK_6748_i2c.c	56;"	d	file:
PINMUX4_I2C0_SDA_ENABLE	drivers\LCDK_6748_i2c.c	53;"	d	file:
PINMUX4_I2C1_SCL_ENABLE	drivers\LCDK_6748_i2c.c	64;"	d	file:
PINMUX4_I2C1_SDA_ENABLE	drivers\LCDK_6748_i2c.c	61;"	d	file:
PINMUX5	C6748_gel_reg.h	248;"	d
PINMUX6	C6748_gel_reg.h	249;"	d
PINMUX7	C6748_gel_reg.h	250;"	d
PINMUX8	C6748_gel_reg.h	251;"	d
PINMUX9	C6748_gel_reg.h	252;"	d
PLL0_ALNCTL	C6748_gel_reg.h	20;"	d
PLL0_BASE	C6748_gel_reg.h	3;"	d
PLL0_BPDIV	C6748_gel_reg.h	16;"	d
PLL0_CKEN	C6748_gel_reg.h	22;"	d
PLL0_CKSTAT	C6748_gel_reg.h	23;"	d
PLL0_DCHANGE	C6748_gel_reg.h	21;"	d
PLL0_OCSEL	C6748_gel_reg.h	7;"	d
PLL0_OSCDIV1	C6748_gel_reg.h	14;"	d
PLL0_PID	C6748_gel_reg.h	4;"	d
PLL0_PLLCMD	C6748_gel_reg.h	18;"	d
PLL0_PLLCTL	C6748_gel_reg.h	6;"	d
PLL0_PLLDIV1	C6748_gel_reg.h	11;"	d
PLL0_PLLDIV10	C6748_gel_reg.h	31;"	d
PLL0_PLLDIV11	C6748_gel_reg.h	32;"	d
PLL0_PLLDIV12	C6748_gel_reg.h	33;"	d
PLL0_PLLDIV13	C6748_gel_reg.h	34;"	d
PLL0_PLLDIV14	C6748_gel_reg.h	35;"	d
PLL0_PLLDIV15	C6748_gel_reg.h	36;"	d
PLL0_PLLDIV16	C6748_gel_reg.h	37;"	d
PLL0_PLLDIV2	C6748_gel_reg.h	12;"	d
PLL0_PLLDIV3	C6748_gel_reg.h	13;"	d
PLL0_PLLDIV4	C6748_gel_reg.h	25;"	d
PLL0_PLLDIV5	C6748_gel_reg.h	26;"	d
PLL0_PLLDIV6	C6748_gel_reg.h	27;"	d
PLL0_PLLDIV7	C6748_gel_reg.h	28;"	d
PLL0_PLLDIV8	C6748_gel_reg.h	29;"	d
PLL0_PLLDIV9	C6748_gel_reg.h	30;"	d
PLL0_PLLM	C6748_gel_reg.h	9;"	d
PLL0_PLLSTAT	C6748_gel_reg.h	19;"	d
PLL0_POSTDIV	C6748_gel_reg.h	15;"	d
PLL0_PREDIV	C6748_gel_reg.h	10;"	d
PLL0_RSTYPE	C6748_gel_reg.h	5;"	d
PLL0_SECCTL	C6748_gel_reg.h	8;"	d
PLL0_SYSTAT	C6748_gel_reg.h	24;"	d
PLL0_WAKEUP	C6748_gel_reg.h	17;"	d
PLL1_ALNCTL	C6748_gel_reg.h	56;"	d
PLL1_ALNCTL	C6748_gel_reg.h	91;"	d
PLL1_BASE	C6748_gel_reg.h	39;"	d
PLL1_BASE	C6748_gel_reg.h	74;"	d
PLL1_BPDIV	C6748_gel_reg.h	52;"	d
PLL1_BPDIV	C6748_gel_reg.h	87;"	d
PLL1_CKEN	C6748_gel_reg.h	58;"	d
PLL1_CKEN	C6748_gel_reg.h	93;"	d
PLL1_CKSTAT	C6748_gel_reg.h	59;"	d
PLL1_CKSTAT	C6748_gel_reg.h	94;"	d
PLL1_DCHANGE	C6748_gel_reg.h	57;"	d
PLL1_DCHANGE	C6748_gel_reg.h	92;"	d
PLL1_OCSEL	C6748_gel_reg.h	43;"	d
PLL1_OCSEL	C6748_gel_reg.h	78;"	d
PLL1_OSCDIV1	C6748_gel_reg.h	50;"	d
PLL1_OSCDIV1	C6748_gel_reg.h	85;"	d
PLL1_PID	C6748_gel_reg.h	40;"	d
PLL1_PID	C6748_gel_reg.h	75;"	d
PLL1_PLLCMD	C6748_gel_reg.h	54;"	d
PLL1_PLLCMD	C6748_gel_reg.h	89;"	d
PLL1_PLLCTL	C6748_gel_reg.h	42;"	d
PLL1_PLLCTL	C6748_gel_reg.h	77;"	d
PLL1_PLLDIV1	C6748_gel_reg.h	47;"	d
PLL1_PLLDIV1	C6748_gel_reg.h	82;"	d
PLL1_PLLDIV10	C6748_gel_reg.h	102;"	d
PLL1_PLLDIV10	C6748_gel_reg.h	67;"	d
PLL1_PLLDIV11	C6748_gel_reg.h	103;"	d
PLL1_PLLDIV11	C6748_gel_reg.h	68;"	d
PLL1_PLLDIV12	C6748_gel_reg.h	104;"	d
PLL1_PLLDIV12	C6748_gel_reg.h	69;"	d
PLL1_PLLDIV13	C6748_gel_reg.h	105;"	d
PLL1_PLLDIV13	C6748_gel_reg.h	70;"	d
PLL1_PLLDIV14	C6748_gel_reg.h	106;"	d
PLL1_PLLDIV14	C6748_gel_reg.h	71;"	d
PLL1_PLLDIV15	C6748_gel_reg.h	107;"	d
PLL1_PLLDIV15	C6748_gel_reg.h	72;"	d
PLL1_PLLDIV16	C6748_gel_reg.h	108;"	d
PLL1_PLLDIV16	C6748_gel_reg.h	73;"	d
PLL1_PLLDIV2	C6748_gel_reg.h	48;"	d
PLL1_PLLDIV2	C6748_gel_reg.h	83;"	d
PLL1_PLLDIV3	C6748_gel_reg.h	49;"	d
PLL1_PLLDIV3	C6748_gel_reg.h	84;"	d
PLL1_PLLDIV4	C6748_gel_reg.h	61;"	d
PLL1_PLLDIV4	C6748_gel_reg.h	96;"	d
PLL1_PLLDIV5	C6748_gel_reg.h	62;"	d
PLL1_PLLDIV5	C6748_gel_reg.h	97;"	d
PLL1_PLLDIV6	C6748_gel_reg.h	63;"	d
PLL1_PLLDIV6	C6748_gel_reg.h	98;"	d
PLL1_PLLDIV7	C6748_gel_reg.h	64;"	d
PLL1_PLLDIV7	C6748_gel_reg.h	99;"	d
PLL1_PLLDIV8	C6748_gel_reg.h	100;"	d
PLL1_PLLDIV8	C6748_gel_reg.h	65;"	d
PLL1_PLLDIV9	C6748_gel_reg.h	101;"	d
PLL1_PLLDIV9	C6748_gel_reg.h	66;"	d
PLL1_PLLM	C6748_gel_reg.h	45;"	d
PLL1_PLLM	C6748_gel_reg.h	80;"	d
PLL1_PLLSTAT	C6748_gel_reg.h	55;"	d
PLL1_PLLSTAT	C6748_gel_reg.h	90;"	d
PLL1_POSTDIV	C6748_gel_reg.h	51;"	d
PLL1_POSTDIV	C6748_gel_reg.h	86;"	d
PLL1_PREDIV	C6748_gel_reg.h	46;"	d
PLL1_PREDIV	C6748_gel_reg.h	81;"	d
PLL1_RSTYPE	C6748_gel_reg.h	41;"	d
PLL1_RSTYPE	C6748_gel_reg.h	76;"	d
PLL1_SECCTL	C6748_gel_reg.h	44;"	d
PLL1_SECCTL	C6748_gel_reg.h	79;"	d
PLL1_SYSTAT	C6748_gel_reg.h	60;"	d
PLL1_SYSTAT	C6748_gel_reg.h	95;"	d
PLL1_WAKEUP	C6748_gel_reg.h	53;"	d
PLL1_WAKEUP	C6748_gel_reg.h	88;"	d
PLLEN_MUX_SWITCH	C6748_gel_reg.h	269;"	d
PLL_LOCK_TIME_CNT	C6748_gel_reg.h	270;"	d
PLL_RESET_TIME_CNT	C6748_gel_reg.h	272;"	d
PLL_STABILIZATION_TIME	C6748_gel_reg.h	271;"	d
PRESCALE_MASK	drivers\timer.c	56;"	d	file:
PSC0_BASE	C6748_gel_reg.h	111;"	d
PSC0_LPSC_SyncReset	C6748_gel.c	/^void PSC0_LPSC_SyncReset(unsigned int PD, unsigned int LPSC_num) {$/;"	f
PSC0_LPSC_enable	C6748_gel.c	/^void PSC0_LPSC_enable(unsigned int PD, unsigned int LPSC_num) {$/;"	f
PSC0_LPSC_enableCore	C6748_gel.c	/^void PSC0_LPSC_enableCore(unsigned int PD, unsigned int LPSC_num) {$/;"	f
PSC0_MDCTL	C6748_gel_reg.h	114;"	d
PSC0_MDSTAT	C6748_gel_reg.h	115;"	d
PSC0_PTCMD	C6748_gel_reg.h	116;"	d
PSC0_PTSTAT	C6748_gel_reg.h	117;"	d
PSC1_BASE	C6748_gel_reg.h	112;"	d
PSC1_LPSC_SyncReset	C6748_gel.c	/^void PSC1_LPSC_SyncReset(unsigned int PD, unsigned int LPSC_num) {$/;"	f
PSC1_LPSC_enable	C6748_gel.c	/^void PSC1_LPSC_enable(unsigned int PD, unsigned int LPSC_num) {$/;"	f
PSC1_LPSC_force	C6748_gel.c	/^void PSC1_LPSC_force(unsigned int LPSC_num) {$/;"	f
PSC1_MDCTL	C6748_gel_reg.h	119;"	d
PSC1_MDSTAT	C6748_gel_reg.h	120;"	d
PSC1_PTCMD	C6748_gel_reg.h	121;"	d
PSC1_PTSTAT	C6748_gel_reg.h	122;"	d
PSCModuleControl	drivers\psc.c	/^int PSCModuleControl (unsigned int baseAdd, unsigned int moduleId,$/;"	f
PSC_All_On	C6748_gel.c	/^void PSC_All_On() {$/;"	f
PSC_TIMEOUT	C6748_gel_reg.h	124;"	d
RX_DMA_INT_ENABLE	board.h	86;"	d
S43_DEPS	Debug\sources.mk	/^S43_DEPS := $/;"	m
S43_DEPS__QUOTED	Debug\sources.mk	/^S43_DEPS__QUOTED := $/;"	m
S43_SRCS	Debug\sources.mk	/^S43_SRCS := $/;"	m
S55_DEPS	Debug\sources.mk	/^S55_DEPS := $/;"	m
S55_DEPS__QUOTED	Debug\sources.mk	/^S55_DEPS__QUOTED := $/;"	m
S55_SRCS	Debug\sources.mk	/^S55_SRCS := $/;"	m
S62_DEPS	Debug\sources.mk	/^S62_DEPS := $/;"	m
S62_DEPS__QUOTED	Debug\sources.mk	/^S62_DEPS__QUOTED := $/;"	m
S62_SRCS	Debug\sources.mk	/^S62_SRCS := $/;"	m
S64_DEPS	Debug\sources.mk	/^S64_DEPS := $/;"	m
S64_DEPS__QUOTED	Debug\sources.mk	/^S64_DEPS__QUOTED := $/;"	m
S64_SRCS	Debug\sources.mk	/^S64_SRCS := $/;"	m
S67_DEPS	Debug\sources.mk	/^S67_DEPS := $/;"	m
S67_DEPS__QUOTED	Debug\sources.mk	/^S67_DEPS__QUOTED := $/;"	m
S67_SRCS	Debug\sources.mk	/^S67_SRCS := $/;"	m
SAMPLING_RATE	board.h	34;"	d
SA_DEPS	Debug\sources.mk	/^SA_DEPS := $/;"	m
SA_DEPS__QUOTED	Debug\sources.mk	/^SA_DEPS__QUOTED := $/;"	m
SA_SRCS	Debug\sources.mk	/^SA_SRCS := $/;"	m
SIZE_PARAMSET	board.h	95;"	d
SLOT_SIZE	board.h	28;"	d
SUBDIRS	Debug\sources.mk	/^SUBDIRS := \\$/;"	m
SYS_BASE	C6748_gel_reg.h	239;"	d
S_DEPS	Debug\sources.mk	/^S_DEPS := $/;"	m
S_DEPS__QUOTED	Debug\sources.mk	/^S_DEPS__QUOTED := $/;"	m
S_SRCS	Debug\sources.mk	/^S_SRCS := $/;"	m
S_UPPER_DEPS	Debug\sources.mk	/^S_UPPER_DEPS := $/;"	m
S_UPPER_DEPS__QUOTED	Debug\sources.mk	/^S_UPPER_DEPS__QUOTED := $/;"	m
S_UPPER_SRCS	Debug\sources.mk	/^S_UPPER_SRCS := $/;"	m
TDDR_MASK	drivers\timer.c	57;"	d	file:
TIME_TRACE_LEN	main.c	32;"	d	file:
TMR_PERIOD_LSB32	board.h	23;"	d
TMR_PERIOD_MSB32	board.h	24;"	d
TRACE_LEN	main.c	43;"	d	file:
TX_DMA_INT_ENABLE	board.h	84;"	d
TimerCaptureConfigure	drivers\timer.c	/^void TimerCaptureConfigure(unsigned int baseAddr, unsigned int timer, $/;"	f
TimerCaptureGet	drivers\timer.c	/^unsigned int TimerCaptureGet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerClockModeSet	drivers\timer.c	/^void TimerClockModeSet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerCompareGet	drivers\timer.c	/^unsigned int TimerCompareGet(unsigned int baseAddr, unsigned int regIndex)$/;"	f
TimerCompareSet	drivers\timer.c	/^void TimerCompareSet(unsigned int baseAddr, unsigned int regIndex, $/;"	f
TimerConfigure	drivers\timer.c	/^void TimerConfigure(unsigned int baseAddr, unsigned int config)$/;"	f
TimerCounterGet	drivers\timer.c	/^unsigned int TimerCounterGet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerCounterSet	drivers\timer.c	/^void TimerCounterSet(unsigned int baseAddr, unsigned int timer, $/;"	f
TimerDisable	drivers\timer.c	/^void TimerDisable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerDivDwnRatio34Get	drivers\timer.c	/^unsigned int TimerDivDwnRatio34Get(unsigned int baseAddr)$/;"	f
TimerDivDwnRatio34Set	drivers\timer.c	/^void TimerDivDwnRatio34Set(unsigned int baseAddr, unsigned int tddr34)$/;"	f
TimerEnable	drivers\timer.c	/^void TimerEnable(unsigned int baseAddr, unsigned int timer, $/;"	f
TimerInputGateDisable	drivers\timer.c	/^void TimerInputGateDisable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerInputGateEnable	drivers\timer.c	/^void TimerInputGateEnable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerIntDisable	drivers\timer.c	/^void TimerIntDisable(unsigned int baseAddr, unsigned int intFlags)$/;"	f
TimerIntEnable	drivers\timer.c	/^void TimerIntEnable(unsigned int baseAddr, unsigned int intFlags)$/;"	f
TimerIntStatusClear	drivers\timer.c	/^unsigned int TimerIntStatusClear(unsigned int baseAddr, unsigned int statFlag)$/;"	f
TimerIntStatusGet	drivers\timer.c	/^unsigned int TimerIntStatusGet(unsigned int baseAddr, unsigned int statFlag)$/;"	f
TimerInvertINDisable	drivers\timer.c	/^void TimerInvertINDisable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerInvertINEnable	drivers\timer.c	/^void TimerInvertINEnable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerInvertOUTDisable	drivers\timer.c	/^void TimerInvertOUTDisable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerInvertOUTEnable	drivers\timer.c	/^void TimerInvertOUTEnable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerOUTStatusGet	drivers\timer.c	/^unsigned int TimerOUTStatusGet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerPeriodGet	drivers\timer.c	/^unsigned int TimerPeriodGet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerPeriodSet	drivers\timer.c	/^void TimerPeriodSet(unsigned int baseAddr, unsigned int timer, $/;"	f
TimerPreScalarCount34Get	drivers\timer.c	/^unsigned int TimerPreScalarCount34Get(unsigned int baseAddr)$/;"	f
TimerPreScalarCount34Set	drivers\timer.c	/^void TimerPreScalarCount34Set(unsigned int baseAddr, unsigned int psc34)$/;"	f
TimerPulseModeSet	drivers\timer.c	/^void TimerPulseModeSet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerPulseWidthSet	drivers\timer.c	/^void TimerPulseWidthSet(unsigned int baseAddr, unsigned int timer, $/;"	f
TimerReadResetDisable	drivers\timer.c	/^void TimerReadResetDisable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerReadResetEnable	drivers\timer.c	/^void TimerReadResetEnable(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerReloadGet	drivers\timer.c	/^unsigned int TimerReloadGet(unsigned int baseAddr, unsigned int timer)$/;"	f
TimerReloadSet	drivers\timer.c	/^void TimerReloadSet(unsigned int baseAddr, unsigned int timer, $/;"	f
TimerSetUp64Bit	main.c	/^static void TimerSetUp64Bit(void)$/;"	f	file:
TimerWatchdogActivate	drivers\timer.c	/^void TimerWatchdogActivate(unsigned int baseAddr)$/;"	f
TimerWatchdogReactivate	drivers\timer.c	/^void TimerWatchdogReactivate(unsigned int baseAddr)$/;"	f
USER_OBJS	Debug\objects.mk	/^USER_OBJS :=$/;"	m
VEC_ENTRY	drivers\intvecs.asm	/^VEC_ENTRY .macro addr$/;"	l
VTPIO_CTL	C6748_gel_reg.h	176;"	d
VTP_TIMEOUT	C6748_gel_reg.h	197;"	d
WDT_KEY_ACTIVE	drivers\timer.c	54;"	d	file:
WDT_KEY_PRE_ACTIVE	drivers\timer.c	53;"	d	file:
WORD_SIZE	board.h	31;"	d
_AIC31_H_	aic31.h	41;"	d
_CODECIF_H_	codecif.h	40;"	d
_c674x_mask_int10_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int10_isr (void)$/;"	f
_c674x_mask_int11_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int11_isr (void)$/;"	f
_c674x_mask_int12_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int12_isr (void)$/;"	f
_c674x_mask_int13_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int13_isr (void)$/;"	f
_c674x_mask_int14_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int14_isr (void)$/;"	f
_c674x_mask_int15_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int15_isr (void)$/;"	f
_c674x_mask_int4_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int4_isr (void)$/;"	f
_c674x_mask_int5_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int5_isr (void)$/;"	f
_c674x_mask_int6_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int6_isr (void)$/;"	f
_c674x_mask_int7_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int7_isr (void)$/;"	f
_c674x_mask_int8_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int8_isr (void)$/;"	f
_c674x_mask_int9_isr	drivers\interrupt.c	/^interrupt void _c674x_mask_int9_isr (void)$/;"	f
_c674x_nmi_isr	drivers\interrupt.c	/^interrupt void _c674x_nmi_isr (void)$/;"	f
_c674x_rsvd_int2_isr	drivers\interrupt.c	/^interrupt void _c674x_rsvd_int2_isr (void)$/;"	f
_c674x_rsvd_int3_isr	drivers\interrupt.c	/^interrupt void _c674x_rsvd_int3_isr (void)$/;"	f
_intcVectorTable	drivers\intvecs.asm	/^_intcVectorTable:$/;"	l
board_init	board.c	/^void board_init(){$/;"	f
c674xECMtbl	drivers\interrupt.c	/^static c674xISR c674xECMtbl[NUM_SYS_EVENTS];$/;"	v	file:
c674xISRtbl	drivers\interrupt.c	/^static c674xISR c674xISRtbl[C674X_INT_COUNT];$/;"	v	file:
dataIdx	codecif.c	/^volatile unsigned int dataIdx = 0;$/;"	v
device_PLL0	C6748_gel.c	/^void device_PLL0(unsigned int CLKMODE, unsigned int PLLM, unsigned int POSTDIV,unsigned int PLLDIV1, unsigned int PLLDIV2, unsigned int PLLDIV3, unsigned int PLLDIV7 ) {$/;"	f
device_PLL1	C6748_gel.c	/^void device_PLL1(unsigned int PLLM,unsigned int POSTDIV,unsigned int PLLDIV1, unsigned int PLLDIV2, unsigned int PLLDIV3 ) {$/;"	f
gel_cpu_ddr_init	board.c	/^void  gel_cpu_ddr_init(void){$/;"	f
get_new_rx_buf	board.c	/^unsigned int get_new_rx_buf(){$/;"	f
get_rdy_tx_buf	board.c	/^unsigned int get_rdy_tx_buf(){$/;"	f
init_tx_buf	board.c	/^void init_tx_buf(){$/;"	f
is_rx_new	board.c	/^unsigned int is_rx_new(){$/;"	f
is_tx_done	board.c	/^unsigned int is_tx_done(){$/;"	f
main	main.c	/^int main(void)$/;"	f
opt_new_trace	main.c	/^unsigned int opt_new_trace [TRACE_LEN];$/;"	v
opt_old_trace	main.c	/^unsigned int opt_old_trace [TRACE_LEN];$/;"	v
proc_buf_L	main.c	/^float proc_buf_L[NUM_SAMPLES_PER_AUDIO_CH];$/;"	v
proc_buf_R	main.c	/^float * proc_buf_R = NULL;$/;"	v
regionId	drivers\edma.c	/^unsigned int regionId;$/;"	v
rxBuf0	board.c	/^unsigned char rxBuf0[AUDIO_BUF_SIZE] = {0};$/;"	v
rxBuf1	board.c	/^unsigned char rxBuf1[AUDIO_BUF_SIZE] = {0};$/;"	v
rxBufPtr	board.c	/^static unsigned int const rxBufPtr[NUM_BUF_PAM] =$/;"	v	file:
rxDefaultPar	board.c	/^static struct EDMA3CCPaRAMEntry const rxDefaultPar =$/;"	v	file:
rx_buf_to_cpu_rd	board.c	/^static volatile unsigned int rx_buf_to_cpu_rd = 0;$/;"	v	file:
rx_buf_to_dma_wr	board.c	/^static volatile unsigned int rx_buf_to_dma_wr = 0;$/;"	v	file:
rx_dma_cnt	board.c	/^unsigned int rx_dma_cnt = 0;$/;"	v
rx_dma_dest	board.c	/^unsigned int rx_dma_dest[DBG_DMA_LEN] = {0};$/;"	v
rx_full	board.c	/^static volatile unsigned int rx_full = 0;$/;"	v	file:
rx_param_dbg	board.c	/^static struct EDMA3CCPaRAMEntry rx_param_dbg[DBG_DMA_LEN] ;$/;"	v	typeref:struct:EDMA3CCPaRAMEntry	file:
savedBase	codecif.c	/^unsigned int savedBase;$/;"	v
slaveData	codecif.c	/^volatile unsigned int slaveData[3];$/;"	v
time_start_zero	main.c	/^void time_start_zero(){$/;"	f
time_trace	main.c	/^unsigned int time_trace[TIME_TRACE_LEN];$/;"	v
timer_init	main.c	/^void timer_init(){$/;"	f
trace_buf_L	main.c	/^float trace_buf_L[NUM_SAMPLES_PER_AUDIO_CH*4];$/;"	v
trace_buf_R	main.c	/^float trace_buf_R[NUM_SAMPLES_PER_AUDIO_CH*4];$/;"	v
txBuf0	board.c	/^unsigned char txBuf0[AUDIO_BUF_SIZE] = {0};$/;"	v
txBuf1	board.c	/^unsigned char txBuf1[AUDIO_BUF_SIZE] = {0};$/;"	v
txBufPtr	board.c	/^static unsigned int const txBufPtr[NUM_BUF_PAM] =$/;"	v	file:
txCompFlag	codecif.c	/^volatile unsigned int txCompFlag = 1;$/;"	v
txDefaultPar	board.c	/^static struct EDMA3CCPaRAMEntry const txDefaultPar = $/;"	v	file:
tx_buf_to_cpu_wr	board.c	/^static volatile unsigned int tx_buf_to_cpu_wr = 0;$/;"	v	file:
tx_buf_to_dma_rd	board.c	/^static volatile unsigned int tx_buf_to_dma_rd = 0;$/;"	v	file:
tx_dma_cnt	board.c	/^unsigned int tx_dma_cnt = 0;$/;"	v
tx_dma_src	board.c	/^unsigned int tx_dma_src[DBG_DMA_LEN] = {0};$/;"	v
tx_done	board.c	/^static volatile unsigned int tx_done = 0;$/;"	v	file:
tx_link	main.c	/^unsigned int tx_link [TRACE_LEN];$/;"	v
tx_src	main.c	/^unsigned int tx_src [TRACE_LEN];$/;"	v
wr_circular_trace_buf	main.c	/^void wr_circular_trace_buf(unsigned int val, unsigned int *p_buf, unsigned int buf_len){$/;"	f
